The present invention relates to analog circuits, and more particularly, to amplifiers.
With increasing data rates in electronic systems, it is expected that optical interconnects (optical fibers) may in the near future replace wire interconnects at the board-to-board and chip-to-chip level. For example, a computer system such as that illustrated in FIG. 1 may comprise one or more boards 102 and memory hierarchy 104 that exchange data packets over optical interconnects 106. These packets may be routed via switch 108, or perhaps the various integrated circuits may be directly connected to one another. In the example of FIG. 1, each board 102 comprises I/O circuit or board 110, and comprises one or more microprocessors, e.g., microprocessor 112, in communication with its corresponding I/O circuit.
An I/O circuit utilizes an optical transceiver, comprising an optical transmitter for up-converting an electrical signal to an optical signal, and an optical receiver for down-converting an optical signal to an electrical signal. An optical receiver usually comprises a photodetector to provide an electrical signal indicative of a received optical signal. A typical small-signal model for a photodetector is provided in FIG. 2, comprising small-signal current source 202 and parasitic capacitor 204. The small-signal current provided by current source 202 is representative of the received optical signal. The output current signal is provided at output port 206.
The output signal provided by the photodetector is amplified to a logical voltage level before utilized by a CDR (Clock and Data Recovery) circuit to recover both the original clock signal and the optically transferred data. A multi-stage amplifier is often employed to amplify the small signal output of the photodetector to a logical voltage level. The front end of the multi-stage amplifier usually a transimpedance amplifier. A transimpedance amplifier provides a small-signal output voltage signal in response to a small-signal input current signal. As one example, the output voltage signal of a transimpedance amplifier may have an amplitude in the range of 100 mV. Because this voltage swing is usually inadequate to drive a CDR circuit, further amplification is usually provided by a limiting and saturating post-amplifier.
Currently, high speed optical communication links involve data rates higher than 10 Gb/s (bits-per-second). The bandwidth of a transimpedance amplifier is typically chosen to be equal to about 0.7 times the bit-rate, which is a compromise between the total integrated noise and the intersymbol interference resulting from the limited bandwidth. For example, a 14 GHz bandwidth transimpedance amplifier may be desirable for a 20 Gb/s optical link. With such high data rates, the number of photons integrated in the photo detector during one clock cycle and the resulting number of electrons generated by the photodetector is relatively low. As a result, high gain, high bandwidth transimpedance amplifiers are desirable.
In addition, to reduce overall system cost, it is often desirable to integrate a transimpedance amplifier on the same die as a microprocessor, digital signal processor, or other digital circuit utilizing CMOS (Complementary Metal Oxide Semiconductor) technology. These digital circuits may introduce power supply and substrate noise. Because the input signals to transimpedance amplifiers are relatively small, the noise amplitude due to power supply and substrate coupling with the digital circuits may exceed that of the input signal. Consequently, there is a need for high gain, high bandwidth CMOS transimpedance amplifiers having good noise tolerance capabilities.